Browsing South African Computer Journal (SACJ) by Subject "Temporal logic"

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ESML - A validation language for concurrent systems

De Villiers, PJA; Visser, WC (South African Computer Society (SAICSIT), 1992)

Designing a concurrent reactive system which can be proven correct is a challenging task. A promising technique involves building a validation model which can be shown to have important correctness properties. This paper ...
Generalised unification of finite temporal logic formulas

Hazelhurst, S (South African Computer Society (SAICSIT), 1999)

Given two temporal logic formulas, g and h, we wish to know whether there is a modification, m, we can make to h so that g ==> m( h). This problem has important applications in hardware verification, where finding such ...
Verification of finite state systems with temporal logic model checking

Schlingloff, B (South African Computer Society (SAICSIT), 1997)

These tutorial notes contain an introduction to the logical theory and computational aspects of computer aided verification of finite state reactive systems with linear and branching temporal logic model checking. As a ...

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