dc.contributor.author |
De Villiers, PJA
|
|
dc.contributor.author |
Visser, WC
|
|
dc.date.accessioned |
2018-05-23T00:45:43Z |
|
dc.date.available |
2018-05-23T00:45:43Z |
|
dc.date.issued |
1992 |
|
dc.identifier.citation |
De Villiers PJA & Visser WC (1992) ESML - A validation language for concurrent systems. The South African Computer Journal, Number 7, 1992 |
en |
dc.identifier.issn |
2313-7835 |
|
dc.identifier.uri |
http://hdl.handle.net/10500/24009 |
|
dc.description.abstract |
Designing a concurrent reactive system which can be proven correct is a challenging task. A promising technique involves building a validation model which can be shown to have important correctness properties. This paper describes a language to specify such models. A model consists of one or more interconnected state machines. The global state of a model is the combined state of all state machines. Channels which enable state machines to communicate form part of the global state. Temporal logic is used to specify correctness requirements of a model and a validation system (based on model checking)
can be used to check these requirements. Design errors such as deadlock can thus be detected. |
en |
dc.language.iso |
en |
en |
dc.publisher |
South African Computer Society (SAICSIT) |
en |
dc.subject |
Verification |
en |
dc.subject |
Specification |
en |
dc.subject |
Temporal logic |
en |
dc.subject |
Concurrency |
en |
dc.title |
ESML - A validation language for concurrent systems |
en |
dc.type |
Article |
en |