Institutional Repository

A Virtual Multiprocessor Computer Design

Show simple item record Turton, Trevor 2018-05-25T09:41:07Z 2018-05-25T09:41:07Z 1984
dc.identifier.citation Trevor Turton (1984) A Virtual Multiprocessor Computer Design. Quaestiones Informaticae Vol 3 No 1, 1984 en
dc.identifier.issn 0254-2757
dc.description.abstract This paper describes computer design which 'would achieve a high instruction throughput rate on a relatively modest amount of hardware. It is based on multiprogramming the CPU at a sub-instruction level. The design will cope well with current computer workloads in on-line environments, where conditional branches and interrupts are frequent. The paper shows that when current high performance computers execute general jobstreams which include on-line work, they require about five machine cycles for each instruction completed, while this design should achieve close to one instruction per cycle_ This level of performance can be realized without the large investments in complexity which current high performance computers make in order to reduce the number of cycles per instruction. Furthermore, the design can be made to be program compatible with any current general purpose multi-processor. en
dc.language.iso en en
dc.publisher Computer Society of South Africa (on behalf of SAICSIT) en
dc.title A Virtual Multiprocessor Computer Design en
dc.type Article en
dc.description.department School of Computing en

Files in this item

This item appears in the following Collection(s)

Show simple item record

Search UnisaIR


My Account